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 Data Sheet No. PD60299
IRS212(7, 71, 8, 81)(S)PbF
CURRENT SENSING SINGLE CHANNEL DRIVER
Features
* Floating channel designed for bootstrap operation * * * * * * *
Fully operational to +600 V Tolerant to negative transient voltage dV/dt immune Application-specific gate drive range: Motor Drive: 12 V to 20 V (IRS2127/IRS2128) Automotive: 9 V to 20 V (IRS21271/IRS21281) Undervoltage lockout 3.3 V, 5 V, and 15 V input logic compatible FAULT lead indicates shutdown has occured Output in phase with input (IRS2127/IRS21271) Output out of phase with input (IRS2128/IRS21281) RoHS compliant
Product Summary
VOFFSET IO+/VOUT VCSth ton/off (typ.) 600 V max. 200 mA / 420 mA 12 V - 20V
(IRS2127/IR2128)
9 V - 20 V
(IRS21271/IR21281)
250 mV or 1.8 V 150 ns & 150 ns
Packages The IRS2127/IRS2128/IRS21271/IRS21281 are high voltage, high speed power MOSFET and IGBT drivers. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL outputs, down to 3.3 V. The protection circuity detects over-current in the driven power transistor and terminates the gate drive voltage. An 8-Lead PDIP 8-Lead SOIC open drain FAULT signal is provided to indicate that an over-current shutdown has occurred. The output driver features a high pulse current buffer stage designed for minimum cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high-side or low-side configuration which operates up to 600 V. Typical Connection
Description
V CC IN FAULT
V CC IN FAULT COM
VB HO CS VS
IRS2127/IRS21271
(Refer to Lead Assignments for correct pin configuration). These diagrams show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout.
V CC IN FAULT
V CC IN FAULT COM
VB HO CS VS
IRS2128/IRS21281
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1
IRS212(7, 71, 8, 81)(S)PbF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions.
Symbol
VB VS VHO VCC VIN VFLT VCS dVs/dt PD RthJA TJ TS TL
Definition
High-side floating supply voltage High-side floating offset voltage High-side floating output voltage Logic supply voltage Logic input voltage FAULT output voltage Current sense voltage Allowable offset supply voltage transient Package power dissipation @ TA +25 C Thermal resistance, junction to ambient Junction temperature Storage temperature Lead temperature (soldering, 10 seconds) 8-Lead DIP 8-Lead SOIC 8-Lead DIP 8-Lead SOIC
Min.
-0.3 VB - 25 VS - 0.3 -0.3 -0.3 -0.3 VS - 0.3 -- -- -- -- -- -- -55 --
Max.
625 VB + 0.3 VB + 0.3 25 VCC + 0.3 VCC + 0.3 VB + 0.3 50 1.0 0.625 125 200 150 150 300
Units
V
V/ns W C/W
C
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the recommended conditions. The VS offset rating is tested with all supplies biased at 15 V differential.
Symbol
VB VS VHO VCC VIN VFLT VCS TA
Definition
High-side floating supply voltage High-side floating offset voltage High-side floating output voltage Logic supply voltage Logic input voltage FAULT output voltage Current sense signal voltage Ambient temperature (IRS2127/IRS2128) (IRS21271/IRS21281)
Min.
VS + 12 VS + 9 Note 1 VS 10 0 0 VS -40
Max.
VS + 20 VS + 20 600 VB 20 VCC VCC VS + 5 125
Units
V
C
Note 1: Logic operational for VS of -5 V to +600 V. Logic state held for VS of -5 V to -VBS. (Please refer to the Design Tip DT97-3 for more details).
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IRS212(7, 71, 8, 81)(S)PbF
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 15 V, CL = 1000 pF and TA = 25 C unless otherwise specified. The dynamic electrical characteristics are measured using the test circuit shown in Fig. 3.
Symbol
ton toff tr tf tbl tcs tflt
Definition
Turn-on propagation delay Turn-off propagation delay Turn-on rise time Turn-off fall time Start-up blanking time CS shutdown propagation delay CS to FAULT pull-up propagation delay
Min.
-- -- -- -- 550 -- --
Typ. Max. Units Test Conditions
150 150 80 40 750 65 270 200 200 130 65 950 360 510 ns VS = 0 V VS = 600 V
Static Electrical Characteristics
VBIAS (VCC, VBS) = 15 V and TA = 25 C unless otherwise specified. The VIN, VTH, and IIN parameters are referenced to COM. The VO and IO parameters are referenced to VS.
Symbol
VIH VIL VCSTH+ VOH VOL ILK IQBS IQCC IIN+ IINICS+ ICSVBSUV+ VBSUVIO+ IORon,FLT
Definition
Logic "1" input voltage Logic "0" input voltage Logic "0" input voltage Logic "1" input voltage CS input positive going threshold (IRS2127/IRS21271) (IRS2128/IRS21281) (IRS2127/IRS21271) (IRS2128/IRS21281) (IRS2127/IRS2128) (IRS21271/IRS21281)
Min.
2.5 -- 180 1.5 -- -- -- -- -- -- -- -- -- (IRS2127/IRS2128) (IRS21271/IRS21281) (IRS2127/IRS2128) (IRS21271/IRS21281) 8.8 6.3 7.5 6.0 200 420 --
Typ. Max. Units Test Conditions
-- -- 250 1.8 0.05 0.02 -- 300 60 7.0 -- -- -- 10.3 7.2 9.0 6.8 290 600 125 -- V 0.8 320 2.1 0.2 0.1 50 800 120 15 5.0 5.0 5.0 11.8 8.2 10.6 7.7 -- mA -- -- VO = 0 V, VIN = 5 V PW 10 s VO = 15 V, VIN = 0 V PW 10 s A V IO = 2 mA VB = VS = 600 V VIN = 0 V or 5 V VIN = 5 V VIN = 0 V VCS = 3 V VCS = 0 V mV VCC = 10 V to 20 V
High level output voltage, VBIAS - VO Low level output voltage, VO Offset supply leakage current Quiescent VBS supply current Quiescent VCC supply current Logic "1" input bias current Logic "0" input bias current "High" CS bias current "High" CS bias current VBS supply undervoltage positive going threshold VBS supply undervoltage negative going threshold
V
Output high short circuit pulsed current Output low short circuit pulsed current FAULT - low on resistance
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IRS212(7, 71, 8, 81)(S)PbF
Functional Block Diagram IRS2127/IRS21271
VCC UV DETECT UP SHIFTERS IN PULSE GEN VB DELAY FAULT PULSE FILTER DOWN SHIFTER PULSE GEN Q R S + CS VS
HV LEVEL SHIFT
VB R R S Q
BUFFER
PULSE FILTER
HO
Q
R S
COM
Functional Block Diagram IRS2128/IRS21281
VB 5V UP SHIFTERS IN PULSE GEN VB DELAY FAULT PULSE FILTER DOW N SHIFTER PULSE GEN Q R S + CS VS UV DETECT
HV LEVEL SHIFT
V CC R R S Q
BUFFER
PULSE FILTER
HO
Q
R S
COM
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IRS212(7, 71, 8, 81)(S)PbF
Lead Definitions
Symbol
VCC IN
FAULT
Description
Logic and gate drive supply Logic input for gate driver output (HO), in phase with HO (IRS2127/IRS21271) out of phase with HO (IRS2128/IRS21281) Indicates over-current shutdown has occurred, negative logic Logic ground High-side floating supply High-side gate drive output High-side floating supply return Current sense input to current sense comparator
COM VB HO VS CS
Lead Assignments
1 2 3 4
VCC IN FAULT COM
VB HO CS VS
8
7 6 5
1 2 3 4
VCC IN FAULT COM
VB HO CS VS
8
7 6 5
8 Lead PDIP
8 Lead SOIC
IRS2127/IRS21271
IRS2127S/IRS21271S
1 2 3 4
VCC IN FAULT COM
VB HO CS VS
8
7 6 5
1 2 3 4
VCC IN FAULT COM
VB HO CS VS
8
7 6 5
8 Lead PDIP
8 Lead SOIC
IRS2128/IRS21281 www.irf.com
IRS2128S/IRS21281S 5
IRS212(7, 71, 8, 81)(S)PbF
IN (IRS2128/ IRS21281)
IN
IN (IRS2128/ IRS21281)
50%
50%
(IRS2127/ IRS21271)
CS IN
50%
50%
(IRS2127/ t IRS21271) on
FAULT HO HO Figure 1. Input/Output Timing Diagram
tr
90%
toff
90%
tf
10%
10%
Figure 2. Switching Time Waveform Definition
IN (IRS2128/ IRS21281)
IN
50%
50%
(IRS2127/ IRS21271)
CS
tbl
90%
HO FAULT
Figure 3. Start-Up Blanking Time Waveform Definitions
VCSTH CS tcs HO
90%
VCSTH CS tflt FAULT
90%
Figure 4. CS Shutdown Waveform Definitions
Figure 5. CS to FAULT Waveform Definitions
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IRS212(7, 71, 8, 81)(S)PbF
300 T ur n- On Delay Time ( ns ) T ur n- On Delay Time ( ns ) 250 200 150 100 50 0 -50 Max Typ
300 250 200 150 100 50 0 -25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature (C) Figure 6A. Turn-On Delay Time vs. Temperature Supply Voltage (V) Figure 6B. Tur n-On Delay Time vs. Voltage Max Typ
300 Turn- Off Delay Time (ns) 250 200 150 100 50 0 -50 Max Typ Turn- Off Delay Time (ns)
250 Max 200 Typ 150 100 50 0 -25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature (C) Figure 7A. Turn-Off Delay Time vs. Temperature Supply Voltage (V) Figure 7B. Turn-Off Delay Time vs. Voltage
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7
IRS212(7, 71, 8, 81)(S)PbF
180 T ur n- O n Ris e Time (ns) 160 140 120 100 80 60 40 20 0 -50 -25 0 25 50 75 100 125 Typ Max T ur n- O n Ris e Time (ns)
180 160 140 120 100 80 60 40 20 0 10 12 14 16 18 20 Temperature (C) Figure 8A. Turn-On Rise Time vs. Temperature Temperature Supply Voltage (V) Figure 8B. Turn-On Rise Time vs. Voltage Typ Max
90 Turn- Off Fall Time (n s) 80 70 60 50 40 30 20 10 0 -50 -25 0 25 50 75 100 125 Typ Max Turn- Off Fall Time (n s)
80 70 60 50 40 30 20 10 0 10 12 14 16 18 20 Temperature (C) Figure 9A. Turn-Off Fall Time vs. Temperature Temperature Supply Voltage (V) Figure 9B. Turn-Off Fall Time vs. Voltage Typ Max
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IRS212(7, 71, 8, 81)(S)PbF
1200 Start- Up Blank ing Tim e ( ns ) Start- Up Blank ing Tim e ( ns ) 1000 Max 800 Typ 600 Min 400 200 0 -50
1200 1000 800 600 400 200 0 -25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature (C) Supply Voltage (V) Figure 10B. Start-Up Blanking Time vs. Voltag e Max Typ Min
Figure 10A. Start-Up Blanking Time vs. Temperature
CS Shutdown Prop. D elay (ns)
CS Shutdown Prop. D elay (ns)
500 450 400 350 300 250 200 150 100 50 0 -50 Typ -25 0 25 50 75 100 125 Max
400 350 300 250 200 150 100 50 0 10
Max
Typ
12
14
16
18
20
Temperature (C) Figure 11A. CS Shutdow n Prop. Delay vs . Temperature
Supply Voltage (V) Figure 11B. CS Shutdow n Pr op. Delay vs. Voltage
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9
IRS212(7, 71, 8, 81)(S)PbF
CS to FAULT Pull-U p Prop. Delay (n s)
CS to FAULT Pull-U p Prop. Delay (n s)
800 700 600 500 400 300 200 100 0 -50 -25 0 25 50 75 100 125 Typ Max
600 500 400 300 200 100 0 10 12 14 16 18 20 Supply Voltage (V) Figure 12B. CS to FAULT Pull-Up Prop. Delay vs. Voltage Typ Max
Temperature (C) Figure 12A. CS to FAULT Pull-Up Prop. Delay vs. Temperature
Logic " 1" ( "0" for 2128 ) VIH Threshold (V)
3 2.5 2 1.5 1 0.5 0 -50 Min
Logic "1" ( "0" for 212 8) VH Threshold (V) I
3 2.5 2 1.5 1 0.5 0 10 12 14 16 18 20 Supply Voltage (V) Figure 13B. L ogic "1" ("0" for 2128) VIH Threshold vs. Voltage Min
-25
0
25
50
75
100
125
Temperature (C) Figure 13A. Logic "1" ("0" for 2128) VIH Threshold vs. Temperature
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IRS212(7, 71, 8, 81)(S)PbF
Logic "0" ("1" for 212 8) V Threshold (V) IL
0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -50 -25 0 25 50 75 100 125 Max
Logic "0" ("1" for 2128) V Thre shold (V) IL
0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 10 12 14 16 18 20 Supply Voltage (V) Figure 14B. Logic "0" ("1" f or 2128) V IL Threshold vs. Voltage Max
Temperature (C) Figure 14A. Logic "0" ("1" for 2128) VIL Threshold vs. Temperature
CS Input Positive Go ing Voltage (V)
CS Input Positive Go ing Voltage (V)
0.35 0.3 0.25 0.2 Min 0.15 0.1 0.05 0 -50 Max Typ
0.35 0.3 0.25 0.2 0.15 0.1 0.05 0 10 12 14 16 18 20 Supply Voltage (V) Figu re 15B. CS Input Positive Going Voltage vs. Voltage Max Typ Min
-25
0
25
50
75
100
125
Temperature (C) Figure 15A. CS Input Positive Going Voltag e vs. Temperature
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IRS212(7, 71, 8, 81)(S)PbF
High Lev el O utput ( I O = 2 mA) (V)
0.25 0.2 0.15 0.1 0.05 0 -50 Typ -25 0 25 50 75 100 125 Max
High Level Output (I O = 2 m A) (V)
0.3
0.25 0.2 0.15 0.1 0.05 0 10 12 14 16 18 20 Supply Voltage (V) Typ Max
Temperature (C) Figure 16A. High Level Output (IO = 2 mA) vs. Temperature
Figure 16B. High Level Output (IO = 2 mA) vs . Voltage
Low Level Output (I O = 2 m A) (V)
0.14 0.12 0.1 0.08 0.06 0.04 0.02 0 -50 Typ -25 0 25 50 75 100 125 Max
Low L evel Output (I O = 2 m A) (V)
0.16
0.12 0.1 0.08 0.06 0.04 0.02 0 10 12 14 16 18 20 Supply Voltage (V) Figure 17B. Low Level Output (I O = 2 mA) vs . Voltage Typ Max
Temperature (C) Figure 17A. L ow Level Output (I O = 2 mA) vs. Temperature
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12
IRS212(7, 71, 8, 81)(S)PbF
O ffse t Supply Leak a ge Curr ent (A)
V BS Supply Current (A)
100 90 80 70 60 50 40 30 20 10 0 -50
60 50 40 30 20 10 0 -25 0 25 50 75 100 125 0 100 200 300 400 500 600 Temperature (C) Figure 18A. Offset Supply Leakage Current vs. Temperature Supply Voltage (V) Figure 18B. High-Side Floating Well Off set Supply Leakage vs. Voltage Max
Max
600 V BS Supp ly Current (A) V BS Supply Current (A) 500 400 300 200 100 0 -50 Typ Max
700 600 500 400 300 200 100 0 -25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature (C) Figure 19A. V BS Supply Current vs.
Temperature
Max
Typ
Supply Voltage (V) Figure 19B. VBS Supply Current vs. Voltage
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13
IRS212(7, 71, 8, 81)(S)PbF
160 V CC Supply Current (A) V CC Supp ly Current (A) 140 120 100 80 60 40 20 0 -50 -25 0 25 50 75 100 125 Typ Max
180 160 140 120 100 80 60 40 20 0 10 12 14 16 18 20 Temperature (C) Figure 20A. VCC Supply Current vs. Temperature Supply Voltage (V) Figure 20B. VCC Supply Curren t vs. Voltage Typ Max
Logic "1" Input Bias C urrent (A)
Logic "1" Input Bias C ur r ent ( A)
20 18 16 14 12 10 8 6 4 2 0 -50 Max
16 14 12 10 8 6 4 2 0 10
Max
Typ
Typ
-25
0
25
50
75
100
125
12
14
16
18
20
Temperature (C) Figure 21A. Lo gic "1" Input Bias Current vs. Temperature
Supply Voltage (V) Figure 21B. Log ic "1" Input Bias Current vs . Voltage
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14
IRS212(7, 71, 8, 81)(S)PbF
Logic "0" Input Bias C urrent (A)
6 5 4 3 2 1 0 -50 -25 0 25 50 75 100 125 Temperature (C) Figure 22A. Lo gic "0" Input Bias Current vs. Temperature Max Logic "0" Input Bias C urrent (A)
6 5 4 3 2 1 0 10 12 14 16 18 20 Supply Voltage (V) Figure 22B. Log ic "0" Input Bias Current vs . Voltage Max
Logic "1" CS Bias Current (A)
5 4 3 2 1 0 -50 -25 0 25 50 75 100 125 Temperature (C) Figure 23A. L ogic "1" CS Bias Current vs .
Temperature
Logic "1" CS Bias Cu r r ent (A)
6
Max
6 5 4 3 2 1 0 10 12 14 16 18 20 Supply Voltage (V) Figure 23B. Lo gic "1" CS Bias Current vs. Voltage Max
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IRS212(7, 71, 8, 81)(S)PbF
Logic "0" CS Bias Current (A)
5 4 3 2 1 0 -50
Logic "0" CS Bias Cu r r ent (A)
6 Max
6 5 4 3 2 1 0 Max
-25
0
25
50
75
100
125
10
12
14
16
18
20
Temperature (C) Figure 24A. L ogic "0" CS Bias Current vs . Temperature
Supply Voltage (V) Figure 24B. Lo gic "0" CS Bias Current vs. Voltage
14 V BS UV T hreshold (+) (V) V BS UV T hreshold (+) (V) 12 10 8 6 4 2 0 -50 Max Typ Min
14 12 10 8 6 4 2 0 -25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature (C) Figure 25A. VBS UV Thre shold (+) vs.
Temperature
Max Typ Min
Supply Voltage (V) Figure 25B. VBS UV Threshold (+) vs. Voltage
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IRS212(7, 71, 8, 81)(S)PbF
12 V BS UV T hreshold (-) (V) 10 8 6 4 2 0 -50 V BS UV T hreshold (-) (V) Max Typ Min
12 10 8 6 4 2 0 -25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature (C) Figure 26A. VBS UV Thre shold (-) vs. Temperature Supply Voltage (V) Figure 26B. VBS UV Threshold (-) vs. Voltage Max Typ Min
0.4 0.35 Output Source Current(A) 0.3 0.25 0.2 0.15 0.1 0.05 0 -50 -25 0 25 50 75 100 125 Min Typ Output Source Current (A)
0.5 0.45 0.4 0.35 0.3 0.25 0.2 0.15 0.1 0.05 0
Typ Min
10
12
14
16
18
20
Temperature (C) Figure 27A. O utput Sour c e Current v s . Temperature
Supply Voltage (V) F igure 27B. O utput Source Current v s. Voltage
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17
IRS212(7, 71, 8, 81)(S)PbF
0.8 Ou tput Sink Current(A) Output Sink Current ( A) 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -50 -25 0 25 50 75 100 125 Min Typ
1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0
Typ Min
10
12
14
16
18
20
Temperature (C) F igur e 28A . O utput Sink Curr ent vs . Temperature
Supply Voltage (V)
Figu r e 28B. Outp ut Sink Cur re nt vs . Voltag e
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IRS212(7, 71, 8, 81)(S)PbF
Case outlines
8-Lead PDIP
D A 5 B
FOOTPRINT 8X 0.72 [.028]
01-6014 01-3003 01 (MS-001AB)
INCHES MIN .0532 .013 .0075 .189 .1497 MAX .0688 .0098 .020 .0098 .1968 .1574 MILLIMETERS MIN 1.35 0.10 0.33 0.19 4.80 3.80 MAX 1.75 0.25 0.51 0.25 5.00 4.00
DIM A b
A1 .0040 c
8 6 E 1
7
6
5 H 0.25 [.010] A
6.46 [.255]
D E e e1 H K L
8X 1.78 [.070]
2
3
4
.050 BASIC .025 BASIC .2284 .0099 .016 0 .2440 .0196 .050 8
1.27 BASIC 0.635 BASIC 5.80 0.25 0.40 0 6.20 0.50 1.27 8
6X e e1 A C
3X 1.27 [.050]
y
K x 45 y 0.10 [.004]
8X b 0.25 [.010]
A1 CAB
8X L 7
8X c
4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA. NOTES: 1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994. 2. CONTROLLING DIMENSION: MILLIMETER 3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES]. 4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA. 5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006]. 6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010]. 7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO A SUBSTRATE.
8-Lead SOIC www.irf.com
01-6027 01-0021 11 (MS-012AA)
19
IRS212(7, 71, 8, 81)(S)PbF
Tape & Reel 8-lead SOIC
LOAD ED TA PE FEED DIRECTION
B
A
H
D F C
N OT E : CO NTROLLING D IM ENSION IN M M
E G
C A R R I E R T A P E D IM E N S I O N F O R 8 S O I C N M e tr ic Im p e r ia l Co d e M in M ax M in M ax A 7 .9 0 8 .1 0 0. 31 1 0 .3 1 8 B 3 .9 0 4 .1 0 0. 15 3 0 .1 6 1 C 1 1 .7 0 1 2 . 30 0 .4 6 0 .4 8 4 D 5 .4 5 5 .5 5 0. 21 4 0 .2 1 8 E 6 .3 0 6 .5 0 0. 24 8 0 .2 5 5 F 5 .1 0 5 .3 0 0. 20 0 0 .2 0 8 G 1 .5 0 n/ a 0. 05 9 n/ a H 1 .5 0 1 .6 0 0. 05 9 0 .0 6 2
F
D C E B A
G
H
R E E L D IM E N S I O N S F O R 8 S O IC N M e tr ic Im p e r ia l Co d e M in M ax M in M ax A 32 9.60 3 3 0 .2 5 1 2 .9 76 1 3 .0 0 1 B 2 0 .9 5 2 1 . 45 0. 82 4 0 .8 4 4 C 1 2 .8 0 1 3 . 20 0. 50 3 0 .5 1 9 D 1 .9 5 2 .4 5 0. 76 7 0 .0 9 6 E 9 8 .0 0 1 0 2 .0 0 3. 85 8 4 .0 1 5 F n /a 1 8 . 40 n /a 0 .7 2 4 G 1 4 .5 0 1 7 . 10 0. 57 0 0 .6 7 3 H 1 2 .4 0 1 4 . 40 0. 48 8 0 .5 6 6
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20
IRS212(7, 71, 8, 81)(S)PbF
LEADFREE PART MARKING INFORMATION
Part number
IRxxxxxx S YWW? ?XXXX
Lot Code (Prod mode - 4 digit SPN code) IR logo
Date code
Pin 1 Identifier ? P MARKING CODE Lead Free Released Non-Lead Free Released
Assembly site code Per SCOP 200-002
ORDER INFORMATION
8-Lead PDIP IRS2127PbF 8-Lead PDIP IRS21271PBF 8-Lead SOIC IRS2127SPbF 8-Lead SOIC IRS21271SPbF 8-Lead SOIC Tape & Reel IRS2127STRPbF 8-Lead SOIC Tape & Reel IRS21271STRPbF 8-Lead PDIP IRS2128PbF 8-Lead PDIP IRS21281PbF 8-Lead SOIC IRS2128SPbF 8-Lead SOIC IRS21281SPbF 8-Lead SOIC Tape & Reel IRS2128STRPbF 8-Lead SOIC Tape & Reel IRS21281STRPbF
The SOIC-8 is MSL2 qualified. This product has been designed and qualified for the industrial level. Qualification standards can be found at www.irf.com IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 Data and specifications subject to change without notice. 6/27/2007
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